A simple CPU has no multiply instruction at all. To work out A times B it adds A into the result exactly B times and decrements a counter, a loop assembled from ADD, SUB and the conditional jump JZ. Every instruction runs through three phases: fetch the word at the address held in PC into the instruction register and bump PC by one, decode the opcode away from the operand, execute inside the ALU through the accumulator ACC. Instructions and data share one array of RAM cells in Von Neumann fashion, so a bare cell betrays nothing about whether it holds a number or an instruction.
A simple CPU has no multiply instruction at all. To work out A times B it adds A into the result exactly B times and decrements a counter, a loop assembled from ADD, SUB and the conditional jump JZ. Every instruction runs through three phases: fetch the word at the address held in PC into the instruction register and bump PC by one, decode the opcode away from the operand, execute inside the ALU through the accumulator ACC. Instructions and data share one array of RAM cells in Von Neumann fashion, so a bare cell betrays nothing about whether it holds a number or an instruction.
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